◉ 半導體 Semiconductor
Semiconductor
從 Wafer-level 量測到後段封裝缺陷分析 — 深度學習 + 顯微影像雙引擎。
From wafer-level metrology to back-end package defect analysis — deep learning paired with microscopic imaging.
產業現況
半導體製程在先進節點（< 7nm）與先進封裝（CoWoS / FOWLP）並行推進；量測與檢測需求從晶圓表面延伸到 TSV、bump、underfill 等隱藏缺陷。
Semiconductor manufacturing now spans advanced nodes (<7nm) and advanced packaging (CoWoS, FOWLP). Inspection must reach hidden defects in TSVs, bumps, and underfills.
三大關鍵挑戰
先進封裝 bump 高度 / 間距檢測需亞微米精度
Sub-micron precision needed for bump height/pitch in advanced packaging.
傳統 AOI 對 colored / textured wafer 召回率不足
Conventional AOI under-recalls on colored/textured wafers.
設備稼動率優化需即時 OEE / 預測性維護
Real-time OEE and predictive maintenance needed for equipment utilization.
LiQung 怎麼幫您
共焦顯微 + 暗場成像 (P3) + AI 缺陷分類 (P6)
Confocal + dark-field microscopy (P3) plus AI defect classification (P6).
產線整合 API (S05) — SECS-GEM / OPC UA 串接 EAP / MES
Production-line API (S05) — SECS-GEM / OPC UA into EAP / MES.
LSTM-Autoencoder 預測性維護模組，停機前 4~72h 預警
LSTM-Autoencoder predictive maintenance — 4–72h pre-failure alerting.
關鍵數字 + 標準
- SEMI E10
- SEMI E30 (GEM)
- SEMI E37 (HSMS)
- ISO/IEC 17025
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